CSIS 118B
Monday, April 23, 2018
Unit 2 » 64-Bit x86 Architecture Login
  • Home
  • Unit 1
    • Data Representation
    • Boolean Operations
    • Video Lecture 1
  • Unit 2
    • Basic Architecture
    • 32-Bit x86 Architecture
    • 64-Bit x86 Architecture
    • x86 Memory Management
    • The Von Neumann Architecture
    • Video Lecture 2
  • Unit 3
    • Assembly Basics
    • Defining Data
    • Symbolic Constants
    • 64-Bit-Programming
    • Video Lecture 3
  • Unit 4
    • Data Transfer Instructions
    • Addition Subtraction
    • Data Related Operators & Directives
    • Indirect Addressing
    • Video Lecture 4
  • Unit 5
    • Procedures
    • Runtime Stack
    • User Defined Procedures
    • Video Lecture 5
  • Unit 6
    • Boolean and Comparison Instructions
    • Conditional Jumps
    • Video Lecture 6
  • Unit 7
    • Shift and Rotate
    • Multiplication and Division
    • Extended Addition Subtraction
  • Unit 8
    • Stack Frames
    • External Procedures
    • Video Lecture 8
  • Unit 9
    • Strings
    • 2D-Arrays
    • Video Lecture 9
  • Unit 10
    • Fixed-Point
    • Floating-Point
    • FPU
    • FP-Arithmetic-Instructions
  • Syllabus
    • CSIS 118B Syllabus-4639
    • CSIS 118B Syllabus-3888-SP17
64-Bit x86 Processors

64-Bit x86 Architecture

The 64-bit processors use the x86-64 instruction set. The instruction set is a 64-bit extension of the x86 instruction set shown in the previous section. The designers made sure the instruction set is backward-compatible with the 32-Bit x86 instruction set. The processor has 64-bit general-purpose registers, so it can have 64-bit operands.

The address space is 48-bit, and therefore it can access 248 RAM, which makes 256 Terabytes of RAM!

In native 64-bit mode, these processors do not support 16-bit real mode or virtual-8086 mode.

64-Bit Operation Mode

In 64-bit mode, the processor runs applications that use the 64-bit linear address space. However, as shown in the previous paragraph, for the moment, processors support only 48-bit address space. This is the native mode for 64-bit Microsoft Windows. This mode enables 64-bit instruction operands.

Be careful when working with the address space and operand length. They are two different entities. The address space refers to the addressable memory, in this case 48 bits. The operand number of bits, represents how many bits can be accessed by the processor in its registers, in this case 64 bits.  

General Purpose Registers

The 64-bit processors have 16 of 64-bit general-purpose registers! Compare this with 8 registers in 32-bit mode. The general-purpose registers can access 8-bit, 16-bit, 32-bit, or 64-bit operands. In 64-bit mode, the processor reverts to 32-bit mode by default and works with eight general-purpose registers as we saw in previous sections.

If we want to access 64 bits long and a total of 16 general-purpose registers become available we need to add a prefix, REX, to each instruction. The added registers are R8, R9 … R15. Here is a table with registers and operand sizes when the REX prefix is enabled.

 

 
Note: The 32-bit EFLAGS register is replaced by a 64-bit RFLAGS register in 64-bit mode. However, RFLAGS uses just the lower 32 bits, so the behavior is the same as EFLAGS.


  
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